Thursday, August 19, 2010

p3 Fast Path Selection for Testing of Small Delay Defects Considering Path Correlations

Abstract
Statistical timing models have been proposed to describe delay variations in very deep sub-micro process technologies, which have increasingly significant influence on
circuit performance.

I. INTRODUCTION
With the progress of very deep sub-micro process technologies, process variations, crosstalk noise, and power supply noise affect the timing characters of circuits
significantly.

II. PROBLEM FORMULATION

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A. For one path

Fig.1 illustrates a two-dimensional (with two random variables Z1 and Z2) sub-space example.

(page 2, col 2, para 2)
Given a path set H, it contains N paths P1, P2, …, PN. The subspace determined by H is represented as SH, which is defined as follows:

III. PROBABILITY ESTIMATION
A. For one path
B. For two paths
C. For three paths
During the path selection process, one path is selected at
first and the probability that P3 meets the delay constraint is
g1(P3).

(page 3)
(page 4)
D. For more than 3 paths
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IV. EXPERIMENTAL RESULTS

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Top longest.
Segment coverage
Monte Carlo [8].
Correlation estimation (our method).

After path selection, with different delay variation
profiles, 1000 circuit samples are generated to estimate the
DFCP of H selected by each method. First, N1 circuit
samples are generated satisfying that all paths in H meet the
delay constraint.